-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 64-Bit"
-- VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Full Version"

-- DATE "04/19/2021 20:47:20"

-- 
-- Device: Altera EP3C40F780C8 Package FBGA780
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIII;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIII.CYCLONEIII_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	zl_2346_3 IS
    PORT (
	clk : IN std_logic;
	datain : IN std_logic_vector(7 DOWNTO 0);
	codeout : OUT std_logic_vector(7 DOWNTO 0);
	sel : OUT std_logic_vector(2 DOWNTO 0);
	en1 : IN std_logic;
	en2 : IN std_logic
	);
END zl_2346_3;

-- Design Ports Information
-- codeout[0]	=>  Location: PIN_C13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[1]	=>  Location: PIN_A17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[2]	=>  Location: PIN_D14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[3]	=>  Location: PIN_C14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[4]	=>  Location: PIN_D13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[5]	=>  Location: PIN_H14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[6]	=>  Location: PIN_B17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- codeout[7]	=>  Location: PIN_AE21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[0]	=>  Location: PIN_E15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[1]	=>  Location: PIN_K15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[2]	=>  Location: PIN_J14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- en1	=>  Location: PIN_D15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- en2	=>  Location: PIN_C15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[0]	=>  Location: PIN_E17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[4]	=>  Location: PIN_C16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[1]	=>  Location: PIN_D16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[5]	=>  Location: PIN_G15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[6]	=>  Location: PIN_F15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[2]	=>  Location: PIN_J17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[3]	=>  Location: PIN_J16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- datain[7]	=>  Location: PIN_C12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- clk	=>  Location: PIN_J2,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF zl_2346_3 IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_datain : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_codeout : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_sel : std_logic_vector(2 DOWNTO 0);
SIGNAL ww_en1 : std_logic;
SIGNAL ww_en2 : std_logic;
SIGNAL \clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \codeout[0]~output_o\ : std_logic;
SIGNAL \codeout[1]~output_o\ : std_logic;
SIGNAL \codeout[2]~output_o\ : std_logic;
SIGNAL \codeout[3]~output_o\ : std_logic;
SIGNAL \codeout[4]~output_o\ : std_logic;
SIGNAL \codeout[5]~output_o\ : std_logic;
SIGNAL \codeout[6]~output_o\ : std_logic;
SIGNAL \codeout[7]~output_o\ : std_logic;
SIGNAL \sel[0]~output_o\ : std_logic;
SIGNAL \sel[1]~output_o\ : std_logic;
SIGNAL \sel[2]~output_o\ : std_logic;
SIGNAL \clk~input_o\ : std_logic;
SIGNAL \clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \sel[0]~0_combout\ : std_logic;
SIGNAL \sel[0]~reg0_q\ : std_logic;
SIGNAL \sel[2]~reg0_q\ : std_logic;
SIGNAL \Add2~0_combout\ : std_logic;
SIGNAL \sel[1]~reg0_q\ : std_logic;
SIGNAL \Add2~1_combout\ : std_logic;
SIGNAL \en2~input_o\ : std_logic;
SIGNAL \en1~input_o\ : std_logic;
SIGNAL \datain[0]~input_o\ : std_logic;
SIGNAL \Cin~0_combout\ : std_logic;
SIGNAL \datain[4]~input_o\ : std_logic;
SIGNAL \Cin~1_combout\ : std_logic;
SIGNAL \Bin~0_combout\ : std_logic;
SIGNAL \Bin~1_combout\ : std_logic;
SIGNAL \Mux3~2_combout\ : std_logic;
SIGNAL \Mux3~3_combout\ : std_logic;
SIGNAL \datain[1]~input_o\ : std_logic;
SIGNAL \C~8_combout\ : std_logic;
SIGNAL \A~0_combout\ : std_logic;
SIGNAL \A[6]~2_combout\ : std_logic;
SIGNAL \CR[0]~4_combout\ : std_logic;
SIGNAL \CR[1]~2_combout\ : std_logic;
SIGNAL \Add1~0_combout\ : std_logic;
SIGNAL \CR[2]~3_combout\ : std_logic;
SIGNAL \C[0]~9_combout\ : std_logic;
SIGNAL \datain[3]~input_o\ : std_logic;
SIGNAL \C~7_combout\ : std_logic;
SIGNAL \datain[2]~input_o\ : std_logic;
SIGNAL \C~6_combout\ : std_logic;
SIGNAL \C~3_combout\ : std_logic;
SIGNAL \C~4_combout\ : std_logic;
SIGNAL \always0~0_combout\ : std_logic;
SIGNAL \A~10_combout\ : std_logic;
SIGNAL \datain[7]~input_o\ : std_logic;
SIGNAL \Pb~feeder_combout\ : std_logic;
SIGNAL \Pb~q\ : std_logic;
SIGNAL \Pc~0_combout\ : std_logic;
SIGNAL \Pc~q\ : std_logic;
SIGNAL \A~1_combout\ : std_logic;
SIGNAL \A~13_combout\ : std_logic;
SIGNAL \A~12_combout\ : std_logic;
SIGNAL \datain[6]~input_o\ : std_logic;
SIGNAL \datain[5]~input_o\ : std_logic;
SIGNAL \Add0~1\ : std_logic;
SIGNAL \Add0~3\ : std_logic;
SIGNAL \Add0~5\ : std_logic;
SIGNAL \Add0~7\ : std_logic;
SIGNAL \Add0~9\ : std_logic;
SIGNAL \Add0~11\ : std_logic;
SIGNAL \Add0~13\ : std_logic;
SIGNAL \Add0~15\ : std_logic;
SIGNAL \Add0~16_combout\ : std_logic;
SIGNAL \A~11_combout\ : std_logic;
SIGNAL \Add0~14_combout\ : std_logic;
SIGNAL \A~6_combout\ : std_logic;
SIGNAL \Add0~12_combout\ : std_logic;
SIGNAL \A~7_combout\ : std_logic;
SIGNAL \Add0~10_combout\ : std_logic;
SIGNAL \A~8_combout\ : std_logic;
SIGNAL \Add0~8_combout\ : std_logic;
SIGNAL \A~9_combout\ : std_logic;
SIGNAL \Add0~6_combout\ : std_logic;
SIGNAL \A~3_combout\ : std_logic;
SIGNAL \Add0~4_combout\ : std_logic;
SIGNAL \A~4_combout\ : std_logic;
SIGNAL \Add0~2_combout\ : std_logic;
SIGNAL \A~5_combout\ : std_logic;
SIGNAL \Add0~0_combout\ : std_logic;
SIGNAL \C[6]~0_combout\ : std_logic;
SIGNAL \always0~1_combout\ : std_logic;
SIGNAL \C~5_combout\ : std_logic;
SIGNAL \s~5_combout\ : std_logic;
SIGNAL \s~0_combout\ : std_logic;
SIGNAL \s~1_combout\ : std_logic;
SIGNAL \s~2_combout\ : std_logic;
SIGNAL \s~3_combout\ : std_logic;
SIGNAL \s~4_combout\ : std_logic;
SIGNAL \Mux3~0_combout\ : std_logic;
SIGNAL \Mux3~1_combout\ : std_logic;
SIGNAL \Mux3~4_combout\ : std_logic;
SIGNAL \Cin~5_combout\ : std_logic;
SIGNAL \Bin~4_combout\ : std_logic;
SIGNAL \Bin~5_combout\ : std_logic;
SIGNAL \Cin~4_combout\ : std_logic;
SIGNAL \Mux1~9_combout\ : std_logic;
SIGNAL \Mux1~10_combout\ : std_logic;
SIGNAL \Mux1~11_combout\ : std_logic;
SIGNAL \s~14_combout\ : std_logic;
SIGNAL \Mux1~13_combout\ : std_logic;
SIGNAL \s~15_combout\ : std_logic;
SIGNAL \Mux1~14_combout\ : std_logic;
SIGNAL \s~12_combout\ : std_logic;
SIGNAL \s~13_combout\ : std_logic;
SIGNAL \Mux1~8_combout\ : std_logic;
SIGNAL \Mux1~12_combout\ : std_logic;
SIGNAL \Cin~6_combout\ : std_logic;
SIGNAL \Cin~7_combout\ : std_logic;
SIGNAL \Bin~7_combout\ : std_logic;
SIGNAL \Bin~6_combout\ : std_logic;
SIGNAL \Mux0~2_combout\ : std_logic;
SIGNAL \Mux0~3_combout\ : std_logic;
SIGNAL \s~16_combout\ : std_logic;
SIGNAL \s~20_combout\ : std_logic;
SIGNAL \s~21_combout\ : std_logic;
SIGNAL \s~19_combout\ : std_logic;
SIGNAL \s~17_combout\ : std_logic;
SIGNAL \s~18_combout\ : std_logic;
SIGNAL \Mux0~0_combout\ : std_logic;
SIGNAL \Mux0~1_combout\ : std_logic;
SIGNAL \Mux0~4_combout\ : std_logic;
SIGNAL \Cin~3_combout\ : std_logic;
SIGNAL \Cin~2_combout\ : std_logic;
SIGNAL \Bin~2_combout\ : std_logic;
SIGNAL \Bin~3_combout\ : std_logic;
SIGNAL \Mux2~2_combout\ : std_logic;
SIGNAL \Mux2~3_combout\ : std_logic;
SIGNAL \s~6_combout\ : std_logic;
SIGNAL \s~11_combout\ : std_logic;
SIGNAL \s~9_combout\ : std_logic;
SIGNAL \s~10_combout\ : std_logic;
SIGNAL \s~7_combout\ : std_logic;
SIGNAL \s~8_combout\ : std_logic;
SIGNAL \Mux2~0_combout\ : std_logic;
SIGNAL \Mux2~1_combout\ : std_logic;
SIGNAL \Mux2~4_combout\ : std_logic;
SIGNAL \WideOr6~0_combout\ : std_logic;
SIGNAL \codeout[0]~reg0_q\ : std_logic;
SIGNAL \WideOr5~0_combout\ : std_logic;
SIGNAL \codeout[1]~reg0_q\ : std_logic;
SIGNAL \WideOr4~0_combout\ : std_logic;
SIGNAL \codeout[2]~reg0_q\ : std_logic;
SIGNAL \WideOr3~0_combout\ : std_logic;
SIGNAL \codeout[3]~reg0_q\ : std_logic;
SIGNAL \WideOr2~0_combout\ : std_logic;
SIGNAL \codeout[4]~reg0_q\ : std_logic;
SIGNAL \WideOr1~0_combout\ : std_logic;
SIGNAL \codeout[5]~reg0_q\ : std_logic;
SIGNAL \WideOr0~0_combout\ : std_logic;
SIGNAL \codeout[6]~reg0_q\ : std_logic;
SIGNAL s : std_logic_vector(15 DOWNTO 0);
SIGNAL Cin : std_logic_vector(7 DOWNTO 0);
SIGNAL CR : std_logic_vector(2 DOWNTO 0);
SIGNAL C : std_logic_vector(7 DOWNTO 0);
SIGNAL Bin : std_logic_vector(7 DOWNTO 0);
SIGNAL B : std_logic_vector(7 DOWNTO 0);
SIGNAL A : std_logic_vector(8 DOWNTO 0);
SIGNAL \ALT_INV_A[6]~2_combout\ : std_logic;

BEGIN

ww_clk <= clk;
ww_datain <= datain;
codeout <= ww_codeout;
sel <= ww_sel;
ww_en1 <= en1;
ww_en2 <= en2;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \clk~input_o\);
\ALT_INV_A[6]~2_combout\ <= NOT \A[6]~2_combout\;

-- Location: IOOBUF_X32_Y43_N2
\codeout[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[0]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[0]~output_o\);

-- Location: IOOBUF_X38_Y43_N23
\codeout[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[1]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[1]~output_o\);

-- Location: IOOBUF_X32_Y43_N23
\codeout[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[2]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[2]~output_o\);

-- Location: IOOBUF_X32_Y43_N16
\codeout[3]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[3]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[3]~output_o\);

-- Location: IOOBUF_X32_Y43_N9
\codeout[4]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[4]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[4]~output_o\);

-- Location: IOOBUF_X38_Y43_N9
\codeout[5]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[5]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[5]~output_o\);

-- Location: IOOBUF_X38_Y43_N30
\codeout[6]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \codeout[6]~reg0_q\,
	devoe => ww_devoe,
	o => \codeout[6]~output_o\);

-- Location: IOOBUF_X54_Y0_N23
\codeout[7]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \codeout[7]~output_o\);

-- Location: IOOBUF_X36_Y43_N2
\sel[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \sel[0]~reg0_q\,
	devoe => ww_devoe,
	o => \sel[0]~output_o\);

-- Location: IOOBUF_X38_Y43_N16
\sel[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \sel[1]~reg0_q\,
	devoe => ww_devoe,
	o => \sel[1]~output_o\);

-- Location: IOOBUF_X36_Y43_N9
\sel[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \sel[2]~reg0_q\,
	devoe => ww_devoe,
	o => \sel[2]~output_o\);

-- Location: IOIBUF_X0_Y21_N1
\clk~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_clk,
	o => \clk~input_o\);

-- Location: CLKCTRL_G4
\clk~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~inputclkctrl_outclk\);

-- Location: LCCOMB_X39_Y42_N20
\sel[0]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \sel[0]~0_combout\ = !\sel[0]~reg0_q\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \sel[0]~reg0_q\,
	combout => \sel[0]~0_combout\);

-- Location: FF_X39_Y42_N21
\sel[0]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \sel[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \sel[0]~reg0_q\);

-- Location: FF_X37_Y42_N7
\sel[2]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add2~1_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \sel[2]~reg0_q\);

-- Location: LCCOMB_X39_Y42_N30
\Add2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add2~0_combout\ = \sel[1]~reg0_q\ $ (\sel[0]~reg0_q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111111110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \sel[1]~reg0_q\,
	datad => \sel[0]~reg0_q\,
	combout => \Add2~0_combout\);

-- Location: FF_X39_Y42_N31
\sel[1]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add2~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \sel[1]~reg0_q\);

-- Location: LCCOMB_X37_Y42_N6
\Add2~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add2~1_combout\ = \sel[2]~reg0_q\ $ (((\sel[0]~reg0_q\ & \sel[1]~reg0_q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[0]~reg0_q\,
	datac => \sel[2]~reg0_q\,
	datad => \sel[1]~reg0_q\,
	combout => \Add2~1_combout\);

-- Location: IOIBUF_X36_Y43_N15
\en2~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_en2,
	o => \en2~input_o\);

-- Location: IOIBUF_X36_Y43_N22
\en1~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_en1,
	o => \en1~input_o\);

-- Location: FF_X39_Y41_N13
\Cin[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(0));

-- Location: IOIBUF_X43_Y43_N1
\datain[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(0),
	o => \datain[0]~input_o\);

-- Location: LCCOMB_X39_Y41_N12
\Cin~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~0_combout\ = (\en2~input_o\ & ((\en1~input_o\ & (Cin(0))) # (!\en1~input_o\ & ((\datain[0]~input_o\))))) # (!\en2~input_o\ & (((Cin(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Cin(0),
	datad => \datain[0]~input_o\,
	combout => \Cin~0_combout\);

-- Location: FF_X39_Y41_N1
\Cin[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~1_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(4));

-- Location: IOIBUF_X41_Y43_N15
\datain[4]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(4),
	o => \datain[4]~input_o\);

-- Location: LCCOMB_X39_Y41_N0
\Cin~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~1_combout\ = (\en2~input_o\ & ((\en1~input_o\ & (Cin(4))) # (!\en1~input_o\ & ((\datain[4]~input_o\))))) # (!\en2~input_o\ & (((Cin(4)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Cin(4),
	datad => \datain[4]~input_o\,
	combout => \Cin~1_combout\);

-- Location: FF_X39_Y41_N11
\Bin[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(0));

-- Location: LCCOMB_X39_Y41_N10
\Bin~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~0_combout\ = (\en2~input_o\ & (((Bin(0))))) # (!\en2~input_o\ & ((\en1~input_o\ & ((\datain[0]~input_o\))) # (!\en1~input_o\ & (Bin(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Bin(0),
	datad => \datain[0]~input_o\,
	combout => \Bin~0_combout\);

-- Location: FF_X39_Y41_N17
\Bin[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~1_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(4));

-- Location: LCCOMB_X39_Y41_N16
\Bin~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~1_combout\ = (\en2~input_o\ & (((Bin(4))))) # (!\en2~input_o\ & ((\en1~input_o\ & ((\datain[4]~input_o\))) # (!\en1~input_o\ & (Bin(4)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Bin(4),
	datad => \datain[4]~input_o\,
	combout => \Bin~1_combout\);

-- Location: LCCOMB_X39_Y41_N2
\Mux3~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux3~2_combout\ = (\sel[1]~reg0_q\ & (((\sel[0]~reg0_q\ & \Bin~1_combout\)))) # (!\sel[1]~reg0_q\ & ((\Bin~0_combout\) # ((\sel[0]~reg0_q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001000110010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Bin~0_combout\,
	datab => \sel[1]~reg0_q\,
	datac => \sel[0]~reg0_q\,
	datad => \Bin~1_combout\,
	combout => \Mux3~2_combout\);

-- Location: LCCOMB_X39_Y41_N30
\Mux3~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux3~3_combout\ = (\Add2~0_combout\ & ((\Mux3~2_combout\ & ((\Cin~1_combout\))) # (!\Mux3~2_combout\ & (\Cin~0_combout\)))) # (!\Add2~0_combout\ & (((\Mux3~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Cin~0_combout\,
	datab => \Cin~1_combout\,
	datac => \Add2~0_combout\,
	datad => \Mux3~2_combout\,
	combout => \Mux3~3_combout\);

-- Location: IOIBUF_X38_Y43_N1
\datain[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(1),
	o => \datain[1]~input_o\);

-- Location: LCCOMB_X38_Y41_N8
\C~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C~8_combout\ = (\en1~input_o\ & (((C(5))))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[4]~input_o\))) # (!\en2~input_o\ & (C(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => C(5),
	datad => \datain[4]~input_o\,
	combout => \C~8_combout\);

-- Location: LCCOMB_X36_Y42_N28
\A~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~0_combout\ = (\en2~input_o\ & \en1~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \en2~input_o\,
	datad => \en1~input_o\,
	combout => \A~0_combout\);

-- Location: LCCOMB_X36_Y42_N24
\A[6]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A[6]~2_combout\ = (\en2~input_o\ & (CR(2) & (\Add1~0_combout\ & \en1~input_o\))) # (!\en2~input_o\ & (((!\en1~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000000001010101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => CR(2),
	datac => \Add1~0_combout\,
	datad => \en1~input_o\,
	combout => \A[6]~2_combout\);

-- Location: LCCOMB_X36_Y42_N26
\CR[0]~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \CR[0]~4_combout\ = (CR(0) & (((\A[6]~2_combout\)))) # (!CR(0) & (\en2~input_o\ & ((\en1~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100101011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \A[6]~2_combout\,
	datac => CR(0),
	datad => \en1~input_o\,
	combout => \CR[0]~4_combout\);

-- Location: FF_X36_Y42_N27
\CR[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \CR[0]~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => CR(0));

-- Location: LCCOMB_X36_Y42_N18
\CR[1]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \CR[1]~2_combout\ = (\A[6]~2_combout\ & (((CR(1))))) # (!\A[6]~2_combout\ & (\A~0_combout\ & (CR(0) $ (CR(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~0_combout\,
	datab => CR(0),
	datac => CR(1),
	datad => \A[6]~2_combout\,
	combout => \CR[1]~2_combout\);

-- Location: FF_X36_Y42_N19
\CR[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \CR[1]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => CR(1));

-- Location: LCCOMB_X36_Y42_N22
\Add1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~0_combout\ = (CR(1) & CR(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => CR(1),
	datad => CR(0),
	combout => \Add1~0_combout\);

-- Location: LCCOMB_X36_Y42_N8
\CR[2]~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \CR[2]~3_combout\ = (\en2~input_o\ & (\en1~input_o\ & ((\Add1~0_combout\) # (CR(2))))) # (!\en2~input_o\ & (((CR(2) & !\en1~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010100001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \Add1~0_combout\,
	datac => CR(2),
	datad => \en1~input_o\,
	combout => \CR[2]~3_combout\);

-- Location: FF_X36_Y42_N9
\CR[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \CR[2]~3_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => CR(2));

-- Location: LCCOMB_X36_Y42_N0
\C[0]~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C[0]~9_combout\ = (\en2~input_o\ & (((!\en1~input_o\) # (!\Add1~0_combout\)) # (!CR(2))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010101010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => CR(2),
	datac => \Add1~0_combout\,
	datad => \en1~input_o\,
	combout => \C[0]~9_combout\);

-- Location: FF_X38_Y41_N9
\C[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \C~8_combout\,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(4));

-- Location: IOIBUF_X43_Y43_N8
\datain[3]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(3),
	o => \datain[3]~input_o\);

-- Location: LCCOMB_X38_Y41_N2
\C~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C~7_combout\ = (\en1~input_o\ & (((C(4))))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[3]~input_o\))) # (!\en2~input_o\ & (C(4)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => C(4),
	datad => \datain[3]~input_o\,
	combout => \C~7_combout\);

-- Location: FF_X38_Y41_N3
\C[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \C~7_combout\,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(3));

-- Location: IOIBUF_X43_Y43_N15
\datain[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(2),
	o => \datain[2]~input_o\);

-- Location: LCCOMB_X38_Y41_N4
\C~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C~6_combout\ = (\en1~input_o\ & (((C(3))))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[2]~input_o\))) # (!\en2~input_o\ & (C(3)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => C(3),
	datad => \datain[2]~input_o\,
	combout => \C~6_combout\);

-- Location: FF_X38_Y41_N5
\C[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \C~6_combout\,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(2));

-- Location: LCCOMB_X39_Y42_N8
\C~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C~3_combout\ = (\en1~input_o\ & (((C(2))))) # (!\en1~input_o\ & ((\en2~input_o\ & (\datain[1]~input_o\)) # (!\en2~input_o\ & ((C(2))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111101000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \datain[1]~input_o\,
	datac => \en2~input_o\,
	datad => C(2),
	combout => \C~3_combout\);

-- Location: FF_X39_Y42_N9
\C[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \C~3_combout\,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(1));

-- Location: LCCOMB_X39_Y42_N14
\C~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C~4_combout\ = (\en1~input_o\ & (C(1))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[0]~input_o\))) # (!\en2~input_o\ & (C(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => C(1),
	datac => \en2~input_o\,
	datad => \datain[0]~input_o\,
	combout => \C~4_combout\);

-- Location: FF_X38_Y42_N15
\C[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \C~4_combout\,
	sload => VCC,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(0));

-- Location: LCCOMB_X37_Y41_N14
\always0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \always0~0_combout\ = (\en1~input_o\ & !\en2~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \en1~input_o\,
	datac => \en2~input_o\,
	combout => \always0~0_combout\);

-- Location: FF_X41_Y42_N7
\B[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[1]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(1));

-- Location: FF_X41_Y42_N11
\B[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[3]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(3));

-- Location: LCCOMB_X36_Y42_N10
\A~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~10_combout\ = (\A~0_combout\ & (((CR(0)) # (!CR(2))) # (!CR(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => CR(1),
	datab => CR(0),
	datac => CR(2),
	datad => \A~0_combout\,
	combout => \A~10_combout\);

-- Location: IOIBUF_X32_Y43_N29
\datain[7]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(7),
	o => \datain[7]~input_o\);

-- Location: LCCOMB_X37_Y41_N0
\Pb~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Pb~feeder_combout\ = \datain[7]~input_o\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \datain[7]~input_o\,
	combout => \Pb~feeder_combout\);

-- Location: FF_X37_Y41_N1
Pb : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Pb~feeder_combout\,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \Pb~q\);

-- Location: LCCOMB_X37_Y42_N0
\Pc~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Pc~0_combout\ = (\en1~input_o\ & (((\Pc~q\)))) # (!\en1~input_o\ & ((\en2~input_o\ & (\datain[7]~input_o\)) # (!\en2~input_o\ & ((\Pc~q\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \datain[7]~input_o\,
	datac => \Pc~q\,
	datad => \en2~input_o\,
	combout => \Pc~0_combout\);

-- Location: FF_X37_Y42_N1
Pc : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Pc~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \Pc~q\);

-- Location: LCCOMB_X36_Y42_N16
\A~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~1_combout\ = (\A~0_combout\ & (CR(2) & (!CR(0) & CR(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000100000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~0_combout\,
	datab => CR(2),
	datac => CR(0),
	datad => CR(1),
	combout => \A~1_combout\);

-- Location: LCCOMB_X36_Y42_N20
\A~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~13_combout\ = (\A~1_combout\ & (\Pb~q\ $ (\Pc~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Pb~q\,
	datac => \Pc~q\,
	datad => \A~1_combout\,
	combout => \A~13_combout\);

-- Location: LCCOMB_X36_Y42_N30
\A~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~12_combout\ = (\en2~input_o\ & (((!\en1~input_o\) # (!\Add1~0_combout\)) # (!CR(2)))) # (!\en2~input_o\ & (((\en1~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111111110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => CR(2),
	datac => \Add1~0_combout\,
	datad => \en1~input_o\,
	combout => \A~12_combout\);

-- Location: FF_X36_Y42_N21
\A[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~13_combout\,
	ena => \A~12_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(8));

-- Location: IOIBUF_X41_Y43_N1
\datain[6]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(6),
	o => \datain[6]~input_o\);

-- Location: FF_X41_Y42_N17
\B[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[6]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(6));

-- Location: IOIBUF_X41_Y43_N8
\datain[5]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_datain(5),
	o => \datain[5]~input_o\);

-- Location: FF_X41_Y42_N15
\B[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[5]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(5));

-- Location: FF_X41_Y42_N13
\B[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[4]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(4));

-- Location: FF_X41_Y42_N9
\B[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[2]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(2));

-- Location: FF_X41_Y42_N5
\B[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	asdata => \datain[0]~input_o\,
	sload => VCC,
	ena => \always0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => B(0));

-- Location: LCCOMB_X41_Y42_N4
\Add0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~0_combout\ = (A(0) & (B(0) $ (VCC))) # (!A(0) & (B(0) & VCC))
-- \Add0~1\ = CARRY((A(0) & B(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(0),
	datab => B(0),
	datad => VCC,
	combout => \Add0~0_combout\,
	cout => \Add0~1\);

-- Location: LCCOMB_X41_Y42_N6
\Add0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~2_combout\ = (B(1) & ((A(1) & (\Add0~1\ & VCC)) # (!A(1) & (!\Add0~1\)))) # (!B(1) & ((A(1) & (!\Add0~1\)) # (!A(1) & ((\Add0~1\) # (GND)))))
-- \Add0~3\ = CARRY((B(1) & (!A(1) & !\Add0~1\)) # (!B(1) & ((!\Add0~1\) # (!A(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(1),
	datab => A(1),
	datad => VCC,
	cin => \Add0~1\,
	combout => \Add0~2_combout\,
	cout => \Add0~3\);

-- Location: LCCOMB_X41_Y42_N8
\Add0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~4_combout\ = ((A(2) $ (B(2) $ (!\Add0~3\)))) # (GND)
-- \Add0~5\ = CARRY((A(2) & ((B(2)) # (!\Add0~3\))) # (!A(2) & (B(2) & !\Add0~3\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => A(2),
	datab => B(2),
	datad => VCC,
	cin => \Add0~3\,
	combout => \Add0~4_combout\,
	cout => \Add0~5\);

-- Location: LCCOMB_X41_Y42_N10
\Add0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~6_combout\ = (B(3) & ((A(3) & (\Add0~5\ & VCC)) # (!A(3) & (!\Add0~5\)))) # (!B(3) & ((A(3) & (!\Add0~5\)) # (!A(3) & ((\Add0~5\) # (GND)))))
-- \Add0~7\ = CARRY((B(3) & (!A(3) & !\Add0~5\)) # (!B(3) & ((!\Add0~5\) # (!A(3)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(3),
	datab => A(3),
	datad => VCC,
	cin => \Add0~5\,
	combout => \Add0~6_combout\,
	cout => \Add0~7\);

-- Location: LCCOMB_X41_Y42_N12
\Add0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~8_combout\ = ((B(4) $ (A(4) $ (!\Add0~7\)))) # (GND)
-- \Add0~9\ = CARRY((B(4) & ((A(4)) # (!\Add0~7\))) # (!B(4) & (A(4) & !\Add0~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(4),
	datab => A(4),
	datad => VCC,
	cin => \Add0~7\,
	combout => \Add0~8_combout\,
	cout => \Add0~9\);

-- Location: LCCOMB_X41_Y42_N14
\Add0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~10_combout\ = (B(5) & ((A(5) & (\Add0~9\ & VCC)) # (!A(5) & (!\Add0~9\)))) # (!B(5) & ((A(5) & (!\Add0~9\)) # (!A(5) & ((\Add0~9\) # (GND)))))
-- \Add0~11\ = CARRY((B(5) & (!A(5) & !\Add0~9\)) # (!B(5) & ((!\Add0~9\) # (!A(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => B(5),
	datab => A(5),
	datad => VCC,
	cin => \Add0~9\,
	combout => \Add0~10_combout\,
	cout => \Add0~11\);

-- Location: LCCOMB_X41_Y42_N16
\Add0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~12_combout\ = ((A(6) $ (B(6) $ (!\Add0~11\)))) # (GND)
-- \Add0~13\ = CARRY((A(6) & ((B(6)) # (!\Add0~11\))) # (!A(6) & (B(6) & !\Add0~11\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => A(6),
	datab => B(6),
	datad => VCC,
	cin => \Add0~11\,
	combout => \Add0~12_combout\,
	cout => \Add0~13\);

-- Location: LCCOMB_X41_Y42_N18
\Add0~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~14_combout\ = (A(7) & (!\Add0~13\)) # (!A(7) & ((\Add0~13\) # (GND)))
-- \Add0~15\ = CARRY((!\Add0~13\) # (!A(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => A(7),
	datad => VCC,
	cin => \Add0~13\,
	combout => \Add0~14_combout\,
	cout => \Add0~15\);

-- Location: LCCOMB_X41_Y42_N20
\Add0~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add0~16_combout\ = \Add0~15\ $ (!A(8))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datad => A(8),
	cin => \Add0~15\,
	combout => \Add0~16_combout\);

-- Location: LCCOMB_X42_Y42_N18
\A~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~11_combout\ = (\A~10_combout\ & ((C(0) & ((\Add0~16_combout\))) # (!C(0) & (A(8)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010100000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~10_combout\,
	datab => A(8),
	datac => C(0),
	datad => \Add0~16_combout\,
	combout => \A~11_combout\);

-- Location: FF_X42_Y42_N19
\A[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~11_combout\,
	ena => \A~12_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(7));

-- Location: LCCOMB_X42_Y42_N30
\A~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~6_combout\ = (\A~0_combout\ & ((C(0) & ((\Add0~14_combout\))) # (!C(0) & (A(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010100000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~0_combout\,
	datab => A(7),
	datac => C(0),
	datad => \Add0~14_combout\,
	combout => \A~6_combout\);

-- Location: FF_X42_Y42_N31
\A[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~6_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(6));

-- Location: LCCOMB_X42_Y42_N24
\A~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~7_combout\ = (\A~0_combout\ & ((C(0) & (\Add0~12_combout\)) # (!C(0) & ((A(6))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100010010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \A~0_combout\,
	datac => \Add0~12_combout\,
	datad => A(6),
	combout => \A~7_combout\);

-- Location: FF_X42_Y42_N25
\A[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~7_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(5));

-- Location: LCCOMB_X42_Y42_N14
\A~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~8_combout\ = (\A~0_combout\ & ((C(0) & ((\Add0~10_combout\))) # (!C(0) & (A(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110000001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => A(5),
	datac => \A~0_combout\,
	datad => \Add0~10_combout\,
	combout => \A~8_combout\);

-- Location: FF_X42_Y42_N15
\A[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~8_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(4));

-- Location: LCCOMB_X42_Y42_N28
\A~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~9_combout\ = (\A~0_combout\ & ((C(0) & ((\Add0~8_combout\))) # (!C(0) & (A(4)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100100001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \A~0_combout\,
	datac => A(4),
	datad => \Add0~8_combout\,
	combout => \A~9_combout\);

-- Location: FF_X42_Y42_N29
\A[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~9_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(3));

-- Location: LCCOMB_X42_Y42_N4
\A~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~3_combout\ = (\A~0_combout\ & ((C(0) & (\Add0~6_combout\)) # (!C(0) & ((A(3))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000110010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add0~6_combout\,
	datab => \A~0_combout\,
	datac => C(0),
	datad => A(3),
	combout => \A~3_combout\);

-- Location: FF_X42_Y42_N5
\A[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~3_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(2));

-- Location: LCCOMB_X42_Y42_N22
\A~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~4_combout\ = (\A~0_combout\ & ((C(0) & ((\Add0~4_combout\))) # (!C(0) & (A(2)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110000001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => A(2),
	datac => \A~0_combout\,
	datad => \Add0~4_combout\,
	combout => \A~4_combout\);

-- Location: FF_X42_Y42_N23
\A[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~4_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(1));

-- Location: LCCOMB_X42_Y42_N20
\A~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \A~5_combout\ = (\A~0_combout\ & ((C(0) & (\Add0~2_combout\)) # (!C(0) & ((A(1))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101000010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \Add0~2_combout\,
	datac => \A~0_combout\,
	datad => A(1),
	combout => \A~5_combout\);

-- Location: FF_X42_Y42_N21
\A[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \A~5_combout\,
	ena => \ALT_INV_A[6]~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => A(0));

-- Location: LCCOMB_X37_Y42_N12
\C[6]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C[6]~0_combout\ = (C(0) & ((\Add0~0_combout\))) # (!C(0) & (A(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111000100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(0),
	datab => C(0),
	datad => \Add0~0_combout\,
	combout => \C[6]~0_combout\);

-- Location: LCCOMB_X37_Y42_N22
\always0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \always0~1_combout\ = (\en2~input_o\ & !\en1~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \en2~input_o\,
	datac => \en1~input_o\,
	combout => \always0~1_combout\);

-- Location: FF_X37_Y42_N13
\C[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \C[6]~0_combout\,
	asdata => \datain[6]~input_o\,
	sload => \always0~1_combout\,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(6));

-- Location: LCCOMB_X37_Y42_N20
\C~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \C~5_combout\ = (\en1~input_o\ & (C(6))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[5]~input_o\))) # (!\en2~input_o\ & (C(6)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => C(6),
	datac => \datain[5]~input_o\,
	datad => \en2~input_o\,
	combout => \C~5_combout\);

-- Location: FF_X37_Y42_N21
\C[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \C~5_combout\,
	ena => \C[0]~9_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => C(5));

-- Location: FF_X37_Y42_N31
\s[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~5_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(4));

-- Location: LCCOMB_X37_Y42_N30
\s~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~5_combout\ = (\A~1_combout\ & (C(5))) # (!\A~1_combout\ & ((s(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => C(5),
	datac => s(4),
	datad => \A~1_combout\,
	combout => \s~5_combout\);

-- Location: FF_X39_Y42_N3
\s[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(0));

-- Location: LCCOMB_X39_Y42_N2
\s~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~0_combout\ = (\A~1_combout\ & (C(1))) # (!\A~1_combout\ & ((s(0))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => C(1),
	datac => s(0),
	datad => \A~1_combout\,
	combout => \s~0_combout\);

-- Location: FF_X39_Y42_N5
\s[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(8));

-- Location: LCCOMB_X39_Y42_N6
\s~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~1_combout\ = (\A~1_combout\ & (!C(0) & ((A(2))))) # (!\A~1_combout\ & (((s(8)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => s(8),
	datac => A(2),
	datad => \A~1_combout\,
	combout => \s~1_combout\);

-- Location: LCCOMB_X39_Y42_N4
\s~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~2_combout\ = (\s~1_combout\) # ((C(0) & (\A~1_combout\ & \Add0~4_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111110000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \A~1_combout\,
	datac => \Add0~4_combout\,
	datad => \s~1_combout\,
	combout => \s~2_combout\);

-- Location: FF_X39_Y42_N17
\s[12]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(12));

-- Location: LCCOMB_X39_Y42_N26
\s~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~3_combout\ = (\A~1_combout\ & (!C(0) & ((A(6))))) # (!\A~1_combout\ & (((s(12)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => s(12),
	datac => A(6),
	datad => \A~1_combout\,
	combout => \s~3_combout\);

-- Location: LCCOMB_X39_Y42_N16
\s~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~4_combout\ = (\s~3_combout\) # ((C(0) & (\A~1_combout\ & \Add0~12_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \A~1_combout\,
	datac => \s~3_combout\,
	datad => \Add0~12_combout\,
	combout => \s~4_combout\);

-- Location: LCCOMB_X39_Y42_N28
\Mux3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux3~0_combout\ = (\sel[1]~reg0_q\ & (\sel[0]~reg0_q\ & ((\s~4_combout\)))) # (!\sel[1]~reg0_q\ & ((\sel[0]~reg0_q\) # ((\s~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110001010100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[1]~reg0_q\,
	datab => \sel[0]~reg0_q\,
	datac => \s~2_combout\,
	datad => \s~4_combout\,
	combout => \Mux3~0_combout\);

-- Location: LCCOMB_X39_Y42_N18
\Mux3~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux3~1_combout\ = (\Add2~0_combout\ & ((\Mux3~0_combout\ & (\s~5_combout\)) # (!\Mux3~0_combout\ & ((\s~0_combout\))))) # (!\Add2~0_combout\ & (((\Mux3~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s~5_combout\,
	datab => \Add2~0_combout\,
	datac => \s~0_combout\,
	datad => \Mux3~0_combout\,
	combout => \Mux3~1_combout\);

-- Location: LCCOMB_X38_Y42_N12
\Mux3~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux3~4_combout\ = (\Add2~1_combout\ & ((\Mux3~1_combout\))) # (!\Add2~1_combout\ & (\Mux3~3_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Add2~1_combout\,
	datac => \Mux3~3_combout\,
	datad => \Mux3~1_combout\,
	combout => \Mux3~4_combout\);

-- Location: FF_X37_Y42_N29
\Cin[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~5_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(6));

-- Location: LCCOMB_X37_Y42_N28
\Cin~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~5_combout\ = (\en1~input_o\ & (((Cin(6))))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[6]~input_o\))) # (!\en2~input_o\ & (Cin(6)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => Cin(6),
	datad => \datain[6]~input_o\,
	combout => \Cin~5_combout\);

-- Location: FF_X37_Y42_N19
\Bin[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(6));

-- Location: LCCOMB_X37_Y42_N18
\Bin~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~4_combout\ = (\en1~input_o\ & ((\en2~input_o\ & (Bin(6))) # (!\en2~input_o\ & ((\datain[6]~input_o\))))) # (!\en1~input_o\ & (((Bin(6)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => Bin(6),
	datad => \datain[6]~input_o\,
	combout => \Bin~4_combout\);

-- Location: FF_X38_Y41_N13
\Bin[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~5_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(2));

-- Location: LCCOMB_X38_Y41_N12
\Bin~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~5_combout\ = (\en1~input_o\ & ((\en2~input_o\ & (Bin(2))) # (!\en2~input_o\ & ((\datain[2]~input_o\))))) # (!\en1~input_o\ & (((Bin(2)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => Bin(2),
	datad => \datain[2]~input_o\,
	combout => \Bin~5_combout\);

-- Location: FF_X38_Y41_N23
\Cin[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(2));

-- Location: LCCOMB_X38_Y41_N22
\Cin~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~4_combout\ = (\en1~input_o\ & (((Cin(2))))) # (!\en1~input_o\ & ((\en2~input_o\ & ((\datain[2]~input_o\))) # (!\en2~input_o\ & (Cin(2)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => Cin(2),
	datad => \datain[2]~input_o\,
	combout => \Cin~4_combout\);

-- Location: LCCOMB_X38_Y41_N0
\Mux1~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~9_combout\ = (\sel[1]~reg0_q\ & (((\Cin~4_combout\ & !\sel[0]~reg0_q\)))) # (!\sel[1]~reg0_q\ & ((\Bin~5_combout\) # ((\sel[0]~reg0_q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Bin~5_combout\,
	datab => \sel[1]~reg0_q\,
	datac => \Cin~4_combout\,
	datad => \sel[0]~reg0_q\,
	combout => \Mux1~9_combout\);

-- Location: LCCOMB_X37_Y42_N10
\Mux1~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~10_combout\ = (\sel[0]~reg0_q\ & ((\Mux1~9_combout\ & (\Cin~5_combout\)) # (!\Mux1~9_combout\ & ((\Bin~4_combout\))))) # (!\sel[0]~reg0_q\ & (((\Mux1~9_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[0]~reg0_q\,
	datab => \Cin~5_combout\,
	datac => \Bin~4_combout\,
	datad => \Mux1~9_combout\,
	combout => \Mux1~10_combout\);

-- Location: LCCOMB_X37_Y42_N8
\Mux1~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~11_combout\ = (\Mux1~10_combout\ & (\sel[2]~reg0_q\ $ (((!\sel[0]~reg0_q\) # (!\sel[1]~reg0_q\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001010100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[2]~reg0_q\,
	datab => \sel[1]~reg0_q\,
	datac => \sel[0]~reg0_q\,
	datad => \Mux1~10_combout\,
	combout => \Mux1~11_combout\);

-- Location: FF_X37_Y42_N15
\s[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~14_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(2));

-- Location: LCCOMB_X37_Y42_N14
\s~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~14_combout\ = (\A~1_combout\ & (C(3))) # (!\A~1_combout\ & ((s(2))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(3),
	datac => s(2),
	datad => \A~1_combout\,
	combout => \s~14_combout\);

-- Location: LCCOMB_X37_Y42_N4
\Mux1~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~13_combout\ = (!\sel[0]~reg0_q\ & (\sel[1]~reg0_q\ & (\s~14_combout\ & \sel[2]~reg0_q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[0]~reg0_q\,
	datab => \sel[1]~reg0_q\,
	datac => \s~14_combout\,
	datad => \sel[2]~reg0_q\,
	combout => \Mux1~13_combout\);

-- Location: FF_X37_Y42_N25
\s[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~15_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(6));

-- Location: LCCOMB_X37_Y42_N24
\s~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~15_combout\ = (\A~1_combout\ & ((\C[6]~0_combout\))) # (!\A~1_combout\ & (s(6)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~1_combout\,
	datac => s(6),
	datad => \C[6]~0_combout\,
	combout => \s~15_combout\);

-- Location: LCCOMB_X37_Y42_N26
\Mux1~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~14_combout\ = (\sel[2]~reg0_q\ & (!\sel[1]~reg0_q\ & (\sel[0]~reg0_q\ & \s~15_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[2]~reg0_q\,
	datab => \sel[1]~reg0_q\,
	datac => \sel[0]~reg0_q\,
	datad => \s~15_combout\,
	combout => \Mux1~14_combout\);

-- Location: FF_X38_Y42_N31
\s[10]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~13_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(10));

-- Location: LCCOMB_X38_Y42_N14
\s~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~12_combout\ = (\A~1_combout\ & (((!C(0) & A(4))))) # (!\A~1_combout\ & (s(10)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010111000100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => s(10),
	datab => \A~1_combout\,
	datac => C(0),
	datad => A(4),
	combout => \s~12_combout\);

-- Location: LCCOMB_X38_Y42_N30
\s~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~13_combout\ = (\s~12_combout\) # ((C(0) & (\A~1_combout\ & \Add0~8_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \A~1_combout\,
	datac => \s~12_combout\,
	datad => \Add0~8_combout\,
	combout => \s~13_combout\);

-- Location: LCCOMB_X38_Y42_N16
\Mux1~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~8_combout\ = (!\sel[0]~reg0_q\ & (!\sel[1]~reg0_q\ & (\sel[2]~reg0_q\ & \s~13_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[0]~reg0_q\,
	datab => \sel[1]~reg0_q\,
	datac => \sel[2]~reg0_q\,
	datad => \s~13_combout\,
	combout => \Mux1~8_combout\);

-- Location: LCCOMB_X38_Y42_N18
\Mux1~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux1~12_combout\ = (\Mux1~11_combout\) # ((\Mux1~13_combout\) # ((\Mux1~14_combout\) # (\Mux1~8_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~11_combout\,
	datab => \Mux1~13_combout\,
	datac => \Mux1~14_combout\,
	datad => \Mux1~8_combout\,
	combout => \Mux1~12_combout\);

-- Location: FF_X39_Y41_N7
\Cin[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(3));

-- Location: LCCOMB_X39_Y41_N6
\Cin~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~6_combout\ = (\en2~input_o\ & ((\en1~input_o\ & (Cin(3))) # (!\en1~input_o\ & ((\datain[3]~input_o\))))) # (!\en2~input_o\ & (((Cin(3)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Cin(3),
	datad => \datain[3]~input_o\,
	combout => \Cin~6_combout\);

-- Location: FF_X39_Y41_N19
\Cin[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~7_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(7));

-- Location: LCCOMB_X39_Y41_N18
\Cin~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~7_combout\ = (\en1~input_o\ & (((Cin(7))))) # (!\en1~input_o\ & ((\en2~input_o\ & (\datain[7]~input_o\)) # (!\en2~input_o\ & ((Cin(7))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110001011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \datain[7]~input_o\,
	datab => \en1~input_o\,
	datac => Cin(7),
	datad => \en2~input_o\,
	combout => \Cin~7_combout\);

-- Location: FF_X39_Y41_N27
\Bin[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~7_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(7));

-- Location: LCCOMB_X39_Y41_N26
\Bin~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~7_combout\ = (\en1~input_o\ & ((\en2~input_o\ & ((Bin(7)))) # (!\en2~input_o\ & (\datain[7]~input_o\)))) # (!\en1~input_o\ & (((Bin(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000010111000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \datain[7]~input_o\,
	datab => \en1~input_o\,
	datac => Bin(7),
	datad => \en2~input_o\,
	combout => \Bin~7_combout\);

-- Location: FF_X39_Y41_N25
\Bin[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(3));

-- Location: LCCOMB_X39_Y41_N24
\Bin~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~6_combout\ = (\en2~input_o\ & (((Bin(3))))) # (!\en2~input_o\ & ((\en1~input_o\ & ((\datain[3]~input_o\))) # (!\en1~input_o\ & (Bin(3)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Bin(3),
	datad => \datain[3]~input_o\,
	combout => \Bin~6_combout\);

-- Location: LCCOMB_X39_Y41_N8
\Mux0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~2_combout\ = (\sel[0]~reg0_q\ & ((\Bin~7_combout\) # ((!\sel[1]~reg0_q\)))) # (!\sel[0]~reg0_q\ & (((!\sel[1]~reg0_q\ & \Bin~6_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000111110001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Bin~7_combout\,
	datab => \sel[0]~reg0_q\,
	datac => \sel[1]~reg0_q\,
	datad => \Bin~6_combout\,
	combout => \Mux0~2_combout\);

-- Location: LCCOMB_X39_Y41_N20
\Mux0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~3_combout\ = (\Add2~0_combout\ & ((\Mux0~2_combout\ & ((\Cin~7_combout\))) # (!\Mux0~2_combout\ & (\Cin~6_combout\)))) # (!\Add2~0_combout\ & (((\Mux0~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Cin~6_combout\,
	datab => \Cin~7_combout\,
	datac => \Add2~0_combout\,
	datad => \Mux0~2_combout\,
	combout => \Mux0~3_combout\);

-- Location: FF_X37_Y42_N3
\s[15]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~16_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(15));

-- Location: LCCOMB_X37_Y42_N2
\s~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~16_combout\ = (\A~1_combout\ & (\Pb~q\ $ (((\Pc~q\))))) # (!\A~1_combout\ & (((s(15)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111001011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~1_combout\,
	datab => \Pb~q\,
	datac => s(15),
	datad => \Pc~q\,
	combout => \s~16_combout\);

-- Location: FF_X41_Y42_N29
\s[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~21_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(7));

-- Location: LCCOMB_X41_Y42_N22
\s~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~20_combout\ = (\A~1_combout\ & (A(1) & ((!C(0))))) # (!\A~1_combout\ & (((s(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000101011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => A(1),
	datab => s(7),
	datac => C(0),
	datad => \A~1_combout\,
	combout => \s~20_combout\);

-- Location: LCCOMB_X41_Y42_N28
\s~21\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~21_combout\ = (\s~20_combout\) # ((C(0) & (\Add0~2_combout\ & \A~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \Add0~2_combout\,
	datac => \s~20_combout\,
	datad => \A~1_combout\,
	combout => \s~21_combout\);

-- Location: FF_X39_Y42_N23
\s[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~19_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(3));

-- Location: LCCOMB_X39_Y42_N22
\s~19\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~19_combout\ = (\A~1_combout\ & (C(4))) # (!\A~1_combout\ & ((s(3))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(4),
	datac => s(3),
	datad => \A~1_combout\,
	combout => \s~19_combout\);

-- Location: FF_X39_Y42_N11
\s[11]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~18_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(11));

-- Location: LCCOMB_X39_Y42_N12
\s~17\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~17_combout\ = (\A~1_combout\ & (!C(0) & ((A(5))))) # (!\A~1_combout\ & (((s(11)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => s(11),
	datac => \A~1_combout\,
	datad => A(5),
	combout => \s~17_combout\);

-- Location: LCCOMB_X39_Y42_N10
\s~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~18_combout\ = (\s~17_combout\) # ((C(0) & (\A~1_combout\ & \Add0~10_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110101010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s~17_combout\,
	datab => C(0),
	datac => \A~1_combout\,
	datad => \Add0~10_combout\,
	combout => \s~18_combout\);

-- Location: LCCOMB_X39_Y42_N24
\Mux0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~0_combout\ = (\sel[1]~reg0_q\ & (!\sel[0]~reg0_q\ & (\s~19_combout\))) # (!\sel[1]~reg0_q\ & ((\sel[0]~reg0_q\) # ((\s~18_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111010101100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[1]~reg0_q\,
	datab => \sel[0]~reg0_q\,
	datac => \s~19_combout\,
	datad => \s~18_combout\,
	combout => \Mux0~0_combout\);

-- Location: LCCOMB_X38_Y42_N0
\Mux0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~1_combout\ = (\sel[0]~reg0_q\ & ((\Mux0~0_combout\ & ((\s~21_combout\))) # (!\Mux0~0_combout\ & (\s~16_combout\)))) # (!\sel[0]~reg0_q\ & (((\Mux0~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \s~16_combout\,
	datab => \sel[0]~reg0_q\,
	datac => \s~21_combout\,
	datad => \Mux0~0_combout\,
	combout => \Mux0~1_combout\);

-- Location: LCCOMB_X38_Y42_N22
\Mux0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux0~4_combout\ = (\Add2~1_combout\ & ((\Mux0~1_combout\))) # (!\Add2~1_combout\ & (\Mux0~3_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Add2~1_combout\,
	datac => \Mux0~3_combout\,
	datad => \Mux0~1_combout\,
	combout => \Mux0~4_combout\);

-- Location: FF_X39_Y41_N23
\Cin[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~3_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(5));

-- Location: LCCOMB_X39_Y41_N22
\Cin~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~3_combout\ = (\en2~input_o\ & ((\en1~input_o\ & (Cin(5))) # (!\en1~input_o\ & ((\datain[5]~input_o\))))) # (!\en2~input_o\ & (((Cin(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Cin(5),
	datad => \datain[5]~input_o\,
	combout => \Cin~3_combout\);

-- Location: FF_X39_Y41_N5
\Cin[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Cin~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Cin(1));

-- Location: LCCOMB_X39_Y41_N4
\Cin~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Cin~2_combout\ = (\en2~input_o\ & ((\en1~input_o\ & (Cin(1))) # (!\en1~input_o\ & ((\datain[1]~input_o\))))) # (!\en2~input_o\ & (((Cin(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en2~input_o\,
	datab => \en1~input_o\,
	datac => Cin(1),
	datad => \datain[1]~input_o\,
	combout => \Cin~2_combout\);

-- Location: FF_X38_Y41_N11
\Bin[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~2_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(1));

-- Location: LCCOMB_X38_Y41_N10
\Bin~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~2_combout\ = (\en1~input_o\ & ((\en2~input_o\ & ((Bin(1)))) # (!\en2~input_o\ & (\datain[1]~input_o\)))) # (!\en1~input_o\ & (((Bin(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \datain[1]~input_o\,
	datac => Bin(1),
	datad => \en2~input_o\,
	combout => \Bin~2_combout\);

-- Location: FF_X38_Y41_N21
\Bin[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Bin~3_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => Bin(5));

-- Location: LCCOMB_X38_Y41_N20
\Bin~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Bin~3_combout\ = (\en1~input_o\ & ((\en2~input_o\ & (Bin(5))) # (!\en2~input_o\ & ((\datain[5]~input_o\))))) # (!\en1~input_o\ & (((Bin(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \en1~input_o\,
	datab => \en2~input_o\,
	datac => Bin(5),
	datad => \datain[5]~input_o\,
	combout => \Bin~3_combout\);

-- Location: LCCOMB_X38_Y41_N14
\Mux2~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux2~2_combout\ = (\sel[1]~reg0_q\ & (((\Bin~3_combout\ & \sel[0]~reg0_q\)))) # (!\sel[1]~reg0_q\ & ((\Bin~2_combout\) # ((\sel[0]~reg0_q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111100001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Bin~2_combout\,
	datab => \Bin~3_combout\,
	datac => \sel[1]~reg0_q\,
	datad => \sel[0]~reg0_q\,
	combout => \Mux2~2_combout\);

-- Location: LCCOMB_X39_Y41_N28
\Mux2~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux2~3_combout\ = (\Add2~0_combout\ & ((\Mux2~2_combout\ & (\Cin~3_combout\)) # (!\Mux2~2_combout\ & ((\Cin~2_combout\))))) # (!\Add2~0_combout\ & (((\Mux2~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Cin~3_combout\,
	datab => \Cin~2_combout\,
	datac => \Add2~0_combout\,
	datad => \Mux2~2_combout\,
	combout => \Mux2~3_combout\);

-- Location: FF_X39_Y42_N1
\s[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(1));

-- Location: LCCOMB_X39_Y42_N0
\s~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~6_combout\ = (\A~1_combout\ & (C(2))) # (!\A~1_combout\ & ((s(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(2),
	datac => s(1),
	datad => \A~1_combout\,
	combout => \s~6_combout\);

-- Location: FF_X37_Y42_N17
\s[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~11_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(5));

-- Location: LCCOMB_X37_Y42_N16
\s~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~11_combout\ = (\A~1_combout\ & (C(6))) # (!\A~1_combout\ & ((s(5))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => C(6),
	datac => s(5),
	datad => \A~1_combout\,
	combout => \s~11_combout\);

-- Location: FF_X41_Y42_N27
\s[13]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~10_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(13));

-- Location: LCCOMB_X41_Y42_N0
\s~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~9_combout\ = (\A~1_combout\ & (!C(0) & (A(7)))) # (!\A~1_combout\ & (((s(13)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100010011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => A(7),
	datac => s(13),
	datad => \A~1_combout\,
	combout => \s~9_combout\);

-- Location: LCCOMB_X41_Y42_N26
\s~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~10_combout\ = (\s~9_combout\) # ((\A~1_combout\ & (C(0) & \Add0~14_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \A~1_combout\,
	datab => \s~9_combout\,
	datac => C(0),
	datad => \Add0~14_combout\,
	combout => \s~10_combout\);

-- Location: FF_X41_Y42_N25
\s[9]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \s~8_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => s(9));

-- Location: LCCOMB_X41_Y42_N2
\s~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~7_combout\ = (\A~1_combout\ & (((A(3) & !C(0))))) # (!\A~1_combout\ & (s(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => s(9),
	datab => A(3),
	datac => C(0),
	datad => \A~1_combout\,
	combout => \s~7_combout\);

-- Location: LCCOMB_X41_Y42_N24
\s~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \s~8_combout\ = (\s~7_combout\) # ((C(0) & (\Add0~6_combout\ & \A~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => C(0),
	datab => \s~7_combout\,
	datac => \Add0~6_combout\,
	datad => \A~1_combout\,
	combout => \s~8_combout\);

-- Location: LCCOMB_X41_Y42_N30
\Mux2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux2~0_combout\ = (\sel[1]~reg0_q\ & (\sel[0]~reg0_q\ & (\s~10_combout\))) # (!\sel[1]~reg0_q\ & ((\sel[0]~reg0_q\) # ((\s~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101010111000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \sel[1]~reg0_q\,
	datab => \sel[0]~reg0_q\,
	datac => \s~10_combout\,
	datad => \s~8_combout\,
	combout => \Mux2~0_combout\);

-- Location: LCCOMB_X38_Y42_N6
\Mux2~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux2~1_combout\ = (\Add2~0_combout\ & ((\Mux2~0_combout\ & ((\s~11_combout\))) # (!\Mux2~0_combout\ & (\s~6_combout\)))) # (!\Add2~0_combout\ & (((\Mux2~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Add2~0_combout\,
	datab => \s~6_combout\,
	datac => \s~11_combout\,
	datad => \Mux2~0_combout\,
	combout => \Mux2~1_combout\);

-- Location: LCCOMB_X38_Y42_N28
\Mux2~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Mux2~4_combout\ = (\Add2~1_combout\ & ((\Mux2~1_combout\))) # (!\Add2~1_combout\ & (\Mux2~3_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Add2~1_combout\,
	datac => \Mux2~3_combout\,
	datad => \Mux2~1_combout\,
	combout => \Mux2~4_combout\);

-- Location: LCCOMB_X38_Y42_N4
\WideOr6~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr6~0_combout\ = (\Mux1~12_combout\ & ((\Mux2~4_combout\) # (\Mux3~4_combout\ $ (\Mux0~4_combout\)))) # (!\Mux1~12_combout\ & ((\Mux0~4_combout\ $ (\Mux2~4_combout\)) # (!\Mux3~4_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101111101111001",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux3~4_combout\,
	datab => \Mux1~12_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux2~4_combout\,
	combout => \WideOr6~0_combout\);

-- Location: FF_X38_Y42_N5
\codeout[0]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr6~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[0]~reg0_q\);

-- Location: LCCOMB_X38_Y42_N10
\WideOr5~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr5~0_combout\ = (\Mux2~4_combout\ & ((\Mux3~4_combout\ & ((!\Mux0~4_combout\))) # (!\Mux3~4_combout\ & (!\Mux1~12_combout\)))) # (!\Mux2~4_combout\ & ((\Mux0~4_combout\ $ (!\Mux3~4_combout\)) # (!\Mux1~12_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110101010111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~12_combout\,
	datab => \Mux2~4_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux3~4_combout\,
	combout => \WideOr5~0_combout\);

-- Location: FF_X38_Y42_N11
\codeout[1]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr5~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[1]~reg0_q\);

-- Location: LCCOMB_X38_Y42_N24
\WideOr4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr4~0_combout\ = (\Mux1~12_combout\ & (((!\Mux2~4_combout\ & \Mux3~4_combout\)) # (!\Mux0~4_combout\))) # (!\Mux1~12_combout\ & (((\Mux0~4_combout\) # (\Mux3~4_combout\)) # (!\Mux2~4_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111111101011011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~12_combout\,
	datab => \Mux2~4_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux3~4_combout\,
	combout => \WideOr4~0_combout\);

-- Location: FF_X38_Y42_N25
\codeout[2]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr4~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[2]~reg0_q\);

-- Location: LCCOMB_X38_Y42_N26
\WideOr3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr3~0_combout\ = (\Mux2~4_combout\ & ((\Mux1~12_combout\ & ((!\Mux3~4_combout\))) # (!\Mux1~12_combout\ & ((\Mux3~4_combout\) # (!\Mux0~4_combout\))))) # (!\Mux2~4_combout\ & ((\Mux0~4_combout\) # (\Mux1~12_combout\ $ (!\Mux3~4_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111011010111101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~12_combout\,
	datab => \Mux2~4_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux3~4_combout\,
	combout => \WideOr3~0_combout\);

-- Location: FF_X38_Y42_N27
\codeout[3]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr3~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[3]~reg0_q\);

-- Location: LCCOMB_X38_Y42_N20
\WideOr2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr2~0_combout\ = (\Mux2~4_combout\ & (((\Mux0~4_combout\) # (!\Mux3~4_combout\)))) # (!\Mux2~4_combout\ & ((\Mux1~12_combout\ & (\Mux0~4_combout\)) # (!\Mux1~12_combout\ & ((!\Mux3~4_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110000011111101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~12_combout\,
	datab => \Mux2~4_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux3~4_combout\,
	combout => \WideOr2~0_combout\);

-- Location: FF_X38_Y42_N21
\codeout[4]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr2~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[4]~reg0_q\);

-- Location: LCCOMB_X38_Y42_N2
\WideOr1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr1~0_combout\ = (\Mux1~12_combout\ & ((\Mux2~4_combout\ $ (!\Mux0~4_combout\)) # (!\Mux3~4_combout\))) # (!\Mux1~12_combout\ & ((\Mux0~4_combout\) # ((!\Mux2~4_combout\ & !\Mux3~4_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101001011111011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~12_combout\,
	datab => \Mux2~4_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux3~4_combout\,
	combout => \WideOr1~0_combout\);

-- Location: FF_X38_Y42_N3
\codeout[5]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr1~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[5]~reg0_q\);

-- Location: LCCOMB_X38_Y42_N8
\WideOr0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \WideOr0~0_combout\ = (\Mux3~4_combout\ & ((\Mux0~4_combout\) # (\Mux1~12_combout\ $ (\Mux2~4_combout\)))) # (!\Mux3~4_combout\ & ((\Mux2~4_combout\) # (\Mux1~12_combout\ $ (\Mux0~4_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111011011011110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Mux1~12_combout\,
	datab => \Mux2~4_combout\,
	datac => \Mux0~4_combout\,
	datad => \Mux3~4_combout\,
	combout => \WideOr0~0_combout\);

-- Location: FF_X38_Y42_N9
\codeout[6]~reg0\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \WideOr0~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \codeout[6]~reg0_q\);

ww_codeout(0) <= \codeout[0]~output_o\;

ww_codeout(1) <= \codeout[1]~output_o\;

ww_codeout(2) <= \codeout[2]~output_o\;

ww_codeout(3) <= \codeout[3]~output_o\;

ww_codeout(4) <= \codeout[4]~output_o\;

ww_codeout(5) <= \codeout[5]~output_o\;

ww_codeout(6) <= \codeout[6]~output_o\;

ww_codeout(7) <= \codeout[7]~output_o\;

ww_sel(0) <= \sel[0]~output_o\;

ww_sel(1) <= \sel[1]~output_o\;

ww_sel(2) <= \sel[2]~output_o\;
END structure;


